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Lookup NU author(s): Dr Stephen McGough, Emeritus Professor Isi Mitrani
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Algorithms for simulating an ATM switch on a distributed memory multiprocessor are described. These include parallel generation of bursty arrival streams, along with the marking and deleting of lost cells due to buffer overflows. These algorithm increase the amount of computation carried out independently by each processor and reduce the communication between the processors. When the number of cells lost is relatively small, the nln time of the simulation is approximately O(N/P), where N is the total number of cells simulated and P is the number of processors. The cells are processed in intervals of fixed length; that length affects the structure and the performance of the algorithms.
Author(s): McGough AS, Mitrani I
Editor(s): Bruce, D; Donatiello, L; Turner, S
Publication type: Conference Proceedings (inc. Abstract)
Publication status: Published
Conference Name: 14th Workshop on Parallel and Distributed Simulation
Year of Conference: 2000
Pages: 85-92
Publisher: IEEE
URL: http://dx.doi.org/10.1109/PADS.2000.847148
DOI: 10.1109/PADS.2000.847148
Library holdings: Search Newcastle University Library for this item
ISBN: 0769506771