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Conditional Partial Order Graphs: Model, Synthesis, and Application

Lookup NU author(s): Dr Andrey Mokhov, Professor Alex Yakovlev

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Abstract

The paper introduces a new formal model for specification and synthesis of control paths in the context of asynchronous system design. The model, called Conditional Partial Order Graph (CPOG), captures concurrency and choice in a system's behavior in a compact and efficient way. It has advantages over widely used interpreted Petri Nets and Finite State Machines for a class of systems which have many behavioral scenarios defined on the same set of actions, e.g., CPU microcontrollers. The CPOG model has potential applications in the area of microcontrol synthesis and brings new methods for modeling concurrency into the application domain of modern and future processor architectures. The paper gives the formal definition of the CPOG model, formulates and solves the problem of CPOG synthesis, and introduces various optimization techniques. The presented ideas can be applied for CPU control synthesis as well as for synthesis of different kinds of event-coordination circuits often used in data coding and communication in digital systems, as demonstrated with several application examples


Publication metadata

Author(s): Mokhov A, Yakovlev A

Publication type: Article

Publication status: Published

Journal: IEEE Transactions on Computers

Year: 2010

Volume: 59

Issue: 11

Pages: 1480-1493

Print publication date: 01/11/2010

Date deposited: 09/12/2010

ISSN (print): 0018-9340

ISSN (electronic): 1557-9956

Publisher: IEEE

URL: http://dx.doi.org/10.1109/TC.2010.58

DOI: 10.1109/TC.2010.58


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Funding

Funder referenceFunder name
EP/C512812/1EPSRC
EP/F016786/1EPSRC

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