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Past studies of the performance of interleaved memory systems are extended in this paper by adopting a more general model. The model assumes a system of N memory modules each of which is made up of b sub-modules, modulo N.B.. For increased effective memory bandwidth a so-called conflict buffer of size L + 1 is assumed to exist for storing address conflicts. A Mark model for memory addressing sequences is then devised and discussed. Analytical results are derived for the mean number of sub-modules accessed in equilibrium under saturated loading conditions, for arbitrary L, N = 2 and, b = 1. Similar results from a Monte Carlo simulation are displayed and discussed for a number of other choices for N and b.
Author(s): Coffman EG, Burnett GJ, Snowdon RA
Series Editor(s): Cox NSM
Publication type: Report
Publication status: Published
Series Title: Computing Laboratory Technical Report Series
Year: 1970
Pages: 15
Print publication date: 01/05/1970
Source Publication Date: May 1970
Report Number: 9
Institution: Computing Laboratory, The University of Newcastle upon Tyne
Place Published: Newcastle upon Tyne